VLSI High-Speed I/O Circuits

About the Book

This book is based on the class notes of a VLSI design course the author offered in Electrical Engineering Department at Arizona State University. The materials are organized into twenty-one special topics covering various aspects of analysis, modeling, and implementation of VLSI high-speed I/O circuits, such as prototype timing models, jitter analysis, transmitter, receiver, equalizer, phase-locked loop (PLL), and data recovery circuit designs.

About the Author

Dr. Hongjiang Song currently serves as adjunct professor as Arizona State University where he has been offering courses in VLSI Analog Signal Processing and VLSI High-Speed I/O Circuits since 2002. He also served several other academic positions, such as faculty of Yunnan University, analog and RF circuits track chair for IEEE International SOCC Conference. He has published two books and number of technical papers in VLSI analog circuits. He holds 24 patents (5 pending). Dr. Song has been with Intel Corporation since 1994, working on various leading-edge VLSI circuit developments in CPU, chipsets, high-speed I/O, RF, and analog circuits. Dr. Song’s key research areas and interests include high-speed/low-power circuits; RF circuit; A/D, D/A and Sigma-Delta converter circuits; phase-lock loop (PLL/DLL) and transceiver circuits; digital and analog signal processing circuits; power management and power amplifier (linear and class-D) circuits.